1. Field of the Invention:
This invention relates generally to a leads-over-chip single-in-line memory module (LOC SIMM) and, more specifically, to an LOC SIMM having a plurality of slots formed in a substrate and a plurality of semiconductor dice attached by their active surfaces to the bottom surface thereof to allow passage of wire bonds from bond pads on the active surface of the semiconductor dice to traces on the upper surface of the substrate that extend over the active surface of each die. The invention has general applicability to all types of multi-chip modules (MCMs).
2. State of the Art:
A leads-over-chip (LOC) integrated circuit (IC) typically includes a semiconductor die (die) mechanically attached and electrically connected to an LOC lead frame. In such an arrangement, the lead frame includes a plurality of lead fingers that extends over and is attached (adhered) to the active surface of the die. The lead fingers are also electrically connected to inputs and outputs (I/Os) or bond pads on the active surface by wire bonds and connect the die to external circuitry located on a substrate such as a printed circuit board (PCB) to which the leads are affixed. Moreover, the lead fingers actually provide physical support for the die. The lead frame and die are typically encapsulated within a transfer-molded plastic package, although preformed ceramic and metal packages may also be used, depending on the operating environment and the packaging requirements of the die.
With ever increasing demands for miniaturization and higher operating speeds, multi-chip module systems (MCMs) are increasingly attractive for a variety of applications. Generally, MCMs may be designed to include more than one type of die within a single package, or may include multiples of the same die, such as the single in-line memory module (SIMM) or dual in-line memory module (DIMM). While SIMMs comprising plastic-packaged dice surface-mounted on a PCB are common, SIMMs may also comprise an elongate planar PCB to which a plurality of identical bare semiconductor memory dice is attached by their back sides. The bare semiconductor dice are then wire bonded to the printed circuit board by a wire bonding apparatus, which typically connects the dice to the circuit board by means of wires, such as gold, aluminum, or other suitable metal or alloy. Such a SIMM configuration requires relatively long wires to be used to form the wire bond connects, which increases electrical parasitics such as inductance and resistance of the connections. That is, because the wires must extend from the top surface of each die to the plane of the circuit board surface, longer wires must be used to connect the dice than if the active surface of the dice was closer to the circuit board surface. Further, the extended lengths of the bond wires result in a susceptibility to damage and shorting during handling.
It is well known that semiconductor dice have a small but significant failure rate as fabricated, often referred to in reliability terms as "infant mortality". As with all multidie assemblies, this phenomenon is also present in SIMMs. For example, a SIMM composed of ten dice, each die having an individual reliability yield of 95%, would result in a first pass test yield of less than 60%, while a SIMM composed of twenty dice, each die having an individual reliability yield of 95%, would produce a first pass test yield of less than 36%. The market's adverse perception of this phenomenon has in the past affected decisions regarding use of SIMMs in various applications.
Previously, an unacceptable die in a SIMM, which has been subjected after assembly to burn-in and testing, has required either the removal and replacement of such a die and a second bum-in and testing cycle or the discard of the entire SIMM, both being time consuming and expensive. A second bum-in/test cycle thus subjects the non-defective dice of the SIMM to unnecessary thermal and electric stress. Additionally, removing and replacing an unacceptable die on a conventional SIMM may pose risk of damage to other SIMM components during the replacement operation.
Depending on the extent of testing and/or burn-in procedures employed, a die may typically be classified into varying levels of reliability and quality. For example, a die may meet only minimal quality standards by undergoing standard probe testing or ground testing while still in wafer form, while individual separated or "singulated" dice may be subjected to tests and burn-in at full-range potentials and temperatures, an acceptably tested and burned-in die being subsequently termed a "known good die" (KGD).
A cost-effective method for producing known reliable SIMMs is desirable for industry acceptance and use of SIMMs in various applications. In an attempt to provide known reliable SIMMs complying with consumer requirements, it is desirable either to fabricate a SIMM of KGD or to fabricate a SIMM of probe-tested (at the water level) dice and subsequently subject the SIMM to burn-in and performance testing to qualify the dice as a group. However, using only KGD in a SIMM may not be cost effective since each KGD has necessarily been subjected to individual performance and burn-in testing, which is costly. In contrast to the use of all KGD in a SIMM, using minimally tested dice with well known production and reliability histories, particularly where the dice being used are known to have a low infant mortality rate, may be the most cost effective alternative to produce SIMM.
As previously stated, typical testing and burn-in procedures are generally labor and time intensive and a second test/burn-in cycle after removal and replacement of a defective die poses significant risks to the qualified dice of a SIMM. Therefore, in an instance where a SIMM is produced from minimally tested dice, in the event that SIMM contains an unacceptable die, replacement of unacceptable dice with a KGD would be preferable in the rework of the SIMM because rework with KGD should not require the SIMM to be subjected to further burn-in, but rather only performance testing. However, as previously noted, prior art practices for die replacement have required removal of a bad die and replacement thereof with a KGD in the same location.
A need exists for an LOC SIMM that provides for shorter wire bonds in comparison to conventional SIMM designs between each die and the SIMM circuit board and the cost-efficient fabrication of SIMMs of known performance and reliability requirements.